Lectures Held on a Regular Basis

Please click here to find the lectures that are held on a regular basis. This information can be used to create a study plan. However, this information is tentative, i.e. always check the lectures of the current and next semester to keep the study plan up to date.

Lectures of the Current Semester

Module details on 'Digital Systems - Digital Systems'

CategoryNetworking & Communication
Lecturerapl. Prof. Dr. Kemnitz, Günter (Clausthal)
Module Exam ID3066
Weekly Composition2L+2L
Required Hours of Work (presence / self-study)125 (42 / 83)
Teaching MethodsIndividual projects, lab work, homework, in-class presentations, group discussions
Module DescriptionThe course starts with the design of digital circuits using VHDL: simulation, synthesis, programming into Xilinx-FPGAs, and testing. The difficuilty of the classes increases from combinatorial circuits of a few gates up to simple graphic adapter functions. In the second part of the course, processor systems will be assemled out of predesigned soft cores: processors, memory controllers etc. Programming language will be C.
Module OutcomesOn successful completion of this module students are able to analyse, design, simulate and test complex digital systems (digital circuits and processor systems) and have acquired practical experience with the digital systems design process.
Recommended Literature- Ashenden: The Designer's Guide to VHDL, Morgan Kaufmann, 2008
PrerequisitesThe module presumes programming skills in C and a prior understanding of digital systems as, for example, acquired through an introductory module on computer engineering at undergraduate level.
ExamWritten or oral exam, graded (Written report and oral presentation (30-45min))

Available Course Modes

In the following document you can get an overview about the available course modes that are offered in the ITIS Master's program: Course Modes